SPARC (Scalable Processor Architecture)
CPU Architecture
| Endianness: | bi |
| Word size: | 32/64 |
| can be contained in: | Sun SparcStation 5 |
| can be contained in: | Sun SparcStation 1 |
| architecture used in: | Sun Ultra 80 |
| architecture used in: | Sun Ultra 60 |
| architecture used in: | Sun Ultra 30 |
| architecture used in: | Sun SparcStation 5 |
| architecture used in: | Sun SPARCclassic |
| architecture used in: | Sun SPARCstation IPC (4/40) |
| architecture used in: | Sun SparcStation 1 |
| architecture used in: | CompuAdd SS 1+ |
| architecture used in: | Sun Fire 6800 |
| architecture used in: | Sun Fire V480 |
| architecture used in: | Sun Enterprise 250 |
| architecture used in: | Sun Enterprise 450 |
| architecture used in: | Tadpole SPARCbook I |
| cpu using this architecture: | Sun UltraSPARC-II |
| cpu using this architecture: | Sun microSPARC |
| cpu using this architecture: | Sun MicroSPARC-II |
| cpu using this architecture: | Cypress CY7C601 |
| cpu using this architecture: | Sun UltraSPARC-III Cu |
| cpu using this architecture: | LSI Logic L64801 |
| cpu using this architecture: | LSI Logic S1A0007 |
| cpu using this architecture: | LSI Logic S1C0010 |
| cpu using this architecture: | Sun UltraSPARC-III |
| cpu using this architecture: | Sun UltraSPARC IV+ |
| cpu architecture class: | RISC (Reduced Instruction Set Computer) |